Digital Circuits

Peter Wilson , in The Circuit Designer's Companion (Fourth Edition), 2017

6.2.1 Mixing Analogue and Digital

The two main problems that designers who have to integrate analogue and digital circuits on the same (printed circuit board) pcb face are

preventing digital switching noise from contaminating the analogue signal, and

interfacing the wide range of analogue input voltages to the digital circuit.

Generating analogue outputs from digital signals is not usually a problem, whereas generating digital inputs from analogue signals is.

Ground Noise

The high-frequency switching noise that was discussed in Section 6.1.3 must be kept out of analogue circuits at all costs. An analogue-to-digital interface quantizes a variable analogue signal into a digital word, and the number of bits in the word determines the resolution that can be achieved of the signal. Assuming a full-scale voltage range of 0–10   V, which is typical of many analogue to digital converters (ADCs), Table 6.1 shows the voltage levels that correspond to 1   bit change in the digital word.

Table 6.1. Analogue to Digital Converter Resolution Voltage for Different Word Lengths, 10   V Full-Scale

Word Length (bit) Resolution Voltage (mV)
8 39
10 10
12 2.4
14 0.6
16 0.15

You can see that the more resolution is demanded of the interface, the smaller the voltage change that will cause 1   bit change. 8   bits is regarded as commonplace in ADC circuits, 12   bits as reasonably high resolution (0.025%), and 16   bits as precision.

The significance of these diminishing voltage levels is that any noise that is coupled into the analogue input will cause unwanted fluctuation of the digital value. For a 12-bit converter, a 1-bit uncertainty will be given by noise of 2.4   mV at the converter input; for a 16-bit converter, this reduces to 150   μV. By contrast, the switching noise on the digital groundline is normally tens of millivolts and frequently hundreds of millivolts peak amplitude. If this noise were coupled into the converter input—and it is hard to keep ground noise out of the input—you would be unable to use a converter of greater precision than 8–10   bits.

Filtering

One partial solution to this problem is to filter the bandwidth of the analogue signal to well below that of the noise so that the effective noise signal is reduced. For slowly varying analogue signals this works reasonably well, especially if the noise injection occurs at the input of the signal-processing amplifier so that bandwidth limitation has maximum effect. Filtering is in any case good practice to minimize susceptibility to external noise.

Filtering the input amplifier is no use if the noise is injected into the ADC itself. For fast ADCs and wide-bandwidth analogue signals you cannot take this approach anyway and the only available solution is to prevent the injection of digital noise at its source.

Segregation

The basic rule to follow when designing an analogue-to-digital interface is to segregate the circuits, including grounds, completely. This means that

separate analogue and digital grounds should be established, connected only at one point

the analogue and digital sections of the circuit should be physically separated, with no digital tracks traversing the analogue section or vice versa. This will minimize cross talk between the circuits.

It should be appreciated that no grounding scheme that establishes a multiplicity of different grounds can ever be optimum because there will always be circuits that need to communicate signals across different ground areas. These signals are then particularly exposed to the nuances of both internal and external interference, or indeed may be the source of it. You should always strive to make such circuits low-risk in terms of their bandwidth and sensitivity or else keep a single ground system for all circuits (both digital and analogue) and take extreme care in its layout so that ground noise from one noisy part of the system does not circulate in another sensitive part.

Single-Board Systems

The appropriate grounding schemes for single-board and multi board systems are shown in Fig. 6.13. If your system has a single ADC, perhaps with a multiplexer to select from several analogue inputs, then the connection between analogue and digital grounds can be made at this ADC as in Fig. 6.13A. This scheme requires that the analogue and digital power supply returns are not linked together anywhere else, so that two separate power supply circuits are needed. The analogue and digital grounds must be treated as entirely separate tracks, despite being nominally at the same potential; unavoidable noise currents circulating in the digital ground will then not couple into the "clean" analogue ground. The digital ground should be of gridded or ground plane construction, whereas the analogue section may benefit from a single-point grounding system or may have a separate ground plane of its own. On no account should you extend the digital ground plane over the analogue section of the board, since there will then be capacitive coupling from one ground plane to another.

Figure 6.13. Layout for Separate Analogue and Digital Grounds.

(A) Single-Board (B) Multiboard. ADC, analogue to digital converter.

Multiboard Systems

When your system consists of several boards, some entirely digital, some entirely analogue, and some a mixture of the two, with an external power supply, then you cannot make the connection between digital and analogue grounds at the ADC. There may be several ADCs in the one system. Instead, make the link at the power supply (Fig. 6.13B) and run separate analogue and digital grounds to each board that requires them. Digital-only boards should be located physically closer to the power supply to minimize the radiating loop area or length.

Read full chapter

URL:

https://www.sciencedirect.com/science/article/pii/B9780081017647000062

Digital circuits

Peter Wilson , in The Circuit Designer's Companion (Third Edition), 2012

6.2.1 Mixing analog and digital

The two main problems which face designers who have to integrate analog and digital circuits on the same PCB are:

preventing digital switching noise from contaminating the analog signal;

interfacing the wide range of analog input voltages to the digital circuit.

Generating analog outputs from digital signals is not usually a problem. Generating digital inputs from analog signals is.

Ground noise

The high-frequency switching noise that was discussed in Section 6.1.3 must be kept out of analog circuits at all costs. An analog-to-digital interface quantizes a variable analog signal into a digital word, and the number of bits in the word determines the resolution that can be achieved of the signal. Assuming a full-scale voltage range of 0 to 10   V, which is typical of many analog–digital converters (ADCs), Table 6.1 shows the voltage levels that correspond to one bit change in the digital word.

Table 6.1. ADC Resolution Voltage for Different Word Lengths, 10   V Full-scale

Word length Resolution voltage
8   bit 39   mV
10   bit 10   mV
12   bit 2.4   mV
14   bit 0.6   mV
16   bit 0.15   mV

You can see that the more resolution is demanded of the interface, the smaller the voltage change that will cause one bit change. Eight bits is regarded as commonplace in ADC circuits, 12   bits as reasonably high resolution (0.025%) and 16   bits as precision.

The significance of these diminishing voltage levels is that any noise that is coupled into the analog input will cause unwanted fluctuation of the digital value. For a 12-bit converter, a one-bit uncertainty will be given by noise of 2.4   mV at the converter input; for a 16-bit converter, this reduces to 150   microvolts. By contrast, the switching noise on the digital ground line is normally tens of millivolts and frequently hundreds of millivolts peak amplitude. If this noise were coupled into the converter input − and it is hard to keep ground noise out of the input − you would be unable to use a converter of greater precision than 8−10   bits.

Filtering

One partial solution to this problem is to filter the bandwidth of the analog signal to well below that of the noise so that the effective noise signal is reduced. For slowly varying analog signals this works reasonably well, especially if the noise injection occurs at the input of the signal-processing amplifier so that bandwidth limitation has maximum effect. Filtering is in any case good practice to minimize susceptibility to external noise.

Filtering the input amplifier is no use if the noise is injected into the ADC itself. For fast ADCs and wide-bandwidth analog signals you cannot take this approach anyway and the only available solution is to prevent the injection of digital noise at its source.

Segregation

The basic rule to follow when designing an analog-to-digital interface is to segregate the circuits, including grounds, completely. This means that:

separate analog and digital grounds should be established, connected only at one point;

the analog and digital sections of the circuit should be physically separated, with no digital tracks traversing the analog section or vice versa. This will minimize crosstalk between the circuits.

It should be appreciated that no grounding scheme which establishes a multiplicity of different grounds can ever be optimum, because there will always be circuits which need to communicate signals across different ground areas. These signals are then particularly exposed to the nuances of both internal and external interference, or indeed may be the source of it. You should always strive to make such circuits low-risk in terms of their bandwidth and sensitivity, or else keep a single ground system for all circuits (both digital and analog) and take extreme care in its layout so that ground noise from one noisy part of the system does not circulate in another sensitive part.

Single-board systems

The appropriate grounding schemes for single-board and multi-board systems are shown in Figure 6.13. If your system has a single analog-to-digital converter, perhaps with a multiplexer to select from several analog inputs, then the connection between analog and digital grounds can be made at this ADC as in Figure 6.13(a). This scheme requires that the analog and digital power supply returns are not linked together anywhere else, so that two separate power supply circuits are needed. The analog and digital grounds must be treated as entirely separate tracks, despite being nominally at the same potential; unavoidable noise currents circulating in the digital ground will then not couple into the "clean" analog ground. The digital ground should be of gridded or ground plane construction, whereas the analog section may benefit from a single-point grounding system, or may have a separate ground plane of its own. On no account should you extend the digital ground plane over the analog section of the board, since there will then be capacitive coupling from one ground plane to another.

FIGURE 6.13. Layout for separate analog and digital grounds

Multi-board systems

When your system consists of several boards, some entirely digital, some entirely analog and some a mixture of the two, with an external power supply, then you cannot make the connection between digital and analog grounds at the ADC. There may be several ADCs in the one system. Instead, make the link at the power supply (Figure 6.13(b)) and run separate analog and digital grounds to each board that requires them. Digital-only boards should be located physically closer to the power supply to minimize the radiating loop area or length.

Read full chapter

URL:

https://www.sciencedirect.com/science/article/pii/B9780080971384000069

Number systems

A.C. Fischer-Cripps , in Newnes Interfacing Companion, 2002

2.1.11 Boolean algebra

Digital electronic circuits contain components which act like high speed switches that process voltage levels TTL high (5 V) and TTL low (0 V). These circuits are thus suitable for representing the binary numbers 0 and 1. TTL high and TTL low may also represent logic states true and false and thus allow binary data to be processed using Boolean algebra in a digital circuit. The components of a digital circuit are called logic gates. Boolean algebra are laws which specify the interaction between logical states true (1) and false (0). Truth tables provide the rules for the Boolean operators.

Read full chapter

URL:

https://www.sciencedirect.com/science/article/pii/B978075065720450108X

Electronic Fundamentals

William B. Ribbens , in Understanding Automotive Electronics (Eighth Edition), 2017

Digital Circuits

Digital circuits, including digital computers, are formed from binary circuits. Binary digital circuits are electronic circuits whose output can be only one of the two different states. Each state is indicated by a particular voltage or current level. Binary circuits can operate in only one of the two states (on or off) corresponding to logic 1 or 0, respectively. Digital circuits also can use transistors. In a digital circuit, a transistor is in either one of the two modes of operation: on, conducting (at saturation), or off (in the cutoff state).

The corresponding binary voltage levels in digital circuits have two states: a high-voltage state denoted VH corresponding to logical 1 and a low voltage state denoted VL corresponding to logical 0.

In electronic digital systems, a transistor is used as a switch. As explained above, a transistor (either bipolar or FET) has three operating regions: cutoff, active, and saturation. If only the saturation or cutoff regions are used, the transistor acts like a switch. When in saturation, the transistor is on and has very low resistance; when in cutoff, it is off and has very high resistance. In digital circuits, the input voltage to the transistor switch must be capable of either saturating the transistor or putting it into a cutoff condition without allowing operation in the active region. The on condition is indicated by a very low output voltage, and the off condition is by an output voltage equal to or slightly below power supply voltage.

Fig. 2.34 depicts an NPN transistor circuit configuration for use in a digital circuit.

Fig. 2.34. NPN transistor digital circuit.

In this figure, it can be seen that no bias resistor is present since this transistor is not operated in the linear (active) mode. Rather, the source voltage is binary-valued having only two voltage levels:

v s = V H high voltage = V L low voltage

The operation of this type of transistor circuit can be illustrated assuming that it is a 2N4401 transistor having characteristic curves as depicted in Fig. 2.16B.

In the present example, it is assumed that the low voltage VL   < Vd where Vd is the base-emitter voltage threshold (discussed above) above which base current flows. Whenever v s   = VL , the base current and collector current are essentially zero. The output voltage v o is given by

(2.54) v o = V cc i c R L V cc

It is assumed that the high voltage for this example is sufficient that the base current ib is given by i b = v H R s > 600 μ a m p

In this case, the output voltage is <   0.5   Volts.

The above example is presented simply as an illustration of a transistor operating in a binary state. Actual binary voltage levels for transistor digital circuits depend upon the type of transistor used and the voltage conventions for representing logical 1 or 0.

Read full chapter

URL:

https://www.sciencedirect.com/science/article/pii/B9780128104347000028

Electronic Systems Design

Ian Grout , in Digital Systems Design with FPGAs and CPLDs, 2008

2.6 Hardware-Software Co-Design

Many digital circuits and systems are based on digital logic hardware only. However, many other digital circuits and systems are based on processors running a software program. These processors will then interface to external hardware circuitry. For such hardware (HW) and software (SW) designs, it is necessary to design the hardware and software parts together to create

a working design (Designing a software program without knowing the hardware it will run on will ultimately result in a failure.)

a design that uses the best set of hardware components

a design that efficiently uses the available hardware

a design that runs an efficient software program

a design that is maintainable and can be upgraded

a design that is cost-effective

Hardware-software co-design [8–10] is an idea that has been around for a long time, being continually refined and updated to adapt to emerging technologies. However, the fundamental basis remains the same: to provide an approach for the cooperative or collaborative design of electronic systems with hardware and software parts.

An approach to hardware-software co-design is shown in Figure 2.12. The design approach initially starts with the system specification, which contains a document or set of documents that define what exactly the system is intended to do. The design choices are then made to identify which parts are to be undertaken in hardware and which parts are to be undertaken in software. This is followed by the partitioning of the design into the hardware parts and software parts, along with the parts that provide the interface between them. It is at this point that the design implementation typically comes to the hardware and software designers. Given that this initial partitioning of the design has been completed, then the system design is refined to develop the specifications for the hardware and software parts.

Figure 2.12. Hardware-software co-design

When those specifications have been developed and formally agreed on, the design can be undertaken. Specific EDA tools relevant to the electronics or the software programming are used. When hardware and software designers work in close co-operation, EDA tools that support an integrated hardware-software co-design approach can be used. Simulation (validation) and formal verification support the design process. On integration of hardware and software, a hardware-software co-simulation might be undertaken that will simulate the operation of the software program on the actual hardware. Design prototyping creates a physical prototype of the overall system that allows the operation of the real design to be evaluated. On successful completion of the design prototyping, the final design would be ready for design production. Depending on the required application, the number of systems to be produced can range from one to millions.

Read full chapter

URL:

https://www.sciencedirect.com/science/article/pii/B9780750683975000027

Gating and Logic Circuits

Ian Sinclair , in Electronics Simplified (Third Edition), 2011

Gates

Digital circuits come in several varieties, but one very basic and important type is the gate, which is used for controlling actions rather than just for counting. More than 100 years before digital electronics was established, an English mathematician called George Boole proved that all of the statements in human logic could be expressed by combinations of three rules which he called AND, OR, and NOT. This logic system is now known as Boolean logic. We will see later how these gates can also be used for simple arithmetic actions.

Definition

A gate in digital electronics means a circuit whose output is a 1 only for some specified combination of inputs. This type of circuit is sometimes referred to as a combinational circuit.

Note

Do not confuse this with an analog gate circuit, which switches an analog waveform on or off depending on the state of a gating input signal.

The importance of all this is that, if we can provide digital gate actions corresponding to these three rules of AND, OR, and NOT, we can construct a circuit that will give a 1 output for any set of logical rules. For example, if we want to have an electric motor switched on when a cover is down, a switch is up, and a timer has reached zero, or when an override switch is pressed, then this set of rules can be expressed in terms of AND, OR, and NOT, and a gate or set of gates can carry out the action.

Figure 10.1 shows the symbols that are used for the three main gate types, the AND, OR, and NOT gates, using two-input gates in the example. The action of these gates will be discussed in detail shortly, but for the moment note that the small circle shown in the NOT symbol is used to mean inversion, converting 1 to 0 or 0 to 1. We can combine the other basic symbols with the NOT circle symbol to give symbols for other gate actions. The early digital integrated circuits (ICs) would typically contain four gates of one type per chip, but modern electronic equipment is more likely to use custom-made chips, with all the gates and their connections formed in one process, using thousands or millions of gates on one chip.

Figure 10.1. Gate symbols for the basic actions of AND, OR, and NOT. These are the internationally used symbols and this drawing shows two variants on the OR symbol

Once again, this makes it more useful to show block diagrams rather than gate circuit details. A gate circuit diagram will consist of a large number of gate symbols with joining lines so that the output of a gate will be connected to one or more other gate inputs. Provided that we know what each basic type of gate does, we can analyze the action of complete gate circuits. In this book we are concerned more with block diagrams than with gate circuits, but some knowledge of gate circuits is useful, and in any case, these are closer in spirit to block diagrams than to circuit diagrams.

Summary

Logic circuits exist to carry out a set of logic actions such as are used for controls for washing machines, tape-recorder drives, computer disk drives, security systems, and a host of industrial control actions. Simple arithmetic actions can also be carried out using logic circuits. All logic actions, however complicated, can be analyzed into simple actions that are called AND, OR, and NOT, so that circuits, called gates, which carry out such actions, are the basis of logical circuits.

Note

Remember that ICs are classed as medium-scale integration (MSI), large-scale integration (LSI), very large-scale integration (VLSI), etc., by the number of equivalent gate circuits on a single chip.

Definition

The action of any gate can be expressed in a truth table. This is just a table that shows all the possible inputs to the gate, and the output for each set of inputs. Remember that each input can be 0 or 1 only, so that each input contributes two possible outputs. The total number of outputs is equal to 2 n , where n is the number of inputs.

For example, if there are four inputs to a gate, then the number of possibilities is 24  =   16, and its truth table will consist of 16 lines. For a lot of truth tables, there is only one output that is different from the rest, and it is easier to remember which one this is than to try to remember the whole of a truth table.

Note

Truth tables are the simplest way of showing what a small-scale gate or gate circuit does, but they are impossibly clumsy when we try to use them on complex gates with a large number of inputs. The more useful method for professional use is called Boolean algebra but, like other mathematical methods, it is beyond the scope of this book. There are computer programs that will analyze the action of a gate circuit using Boolean algebra.

Figure 10.2 shows truth tables for the basic two-input AND, OR, and NOT gates. Of these, the NOT gate is a simple one, with just one input and one output. Its action is that of a logic inverter. If the input is 0, then the output is not0, which is 1. If the input is 1, then the output is not1, which is 0. The other two gate types permit more than one input, and the examples show two inputs, the most common number. The action of the AND gate is to give a 1 output only when both inputs are at 1, and a 0 output for any other combination. The action of the OR gate is to give a 0 output when each input is 0, but a 1 for any other combination of inputs. The same arguments apply to gates with more than two inputs.

Figure 10.2. Truth tables for gates. The AND and OR gates are illustrated in two-input form

Summary

A truth table is a simple but clumsy way of showing what the output of a gate or gate circuit will be for each and every possible combination of inputs. The alternative is to use Boolean algebra, a process that is greatly simplified by computer programs that carry out an analysis of gate circuits.

NAND and NOR Gates

Two particularly useful gate types can be made by combining the action of an inverter with that of the AND and OR gates. The combination of NOT and AND gives the NAND gate, whose symbols and truth table (for two inputs) are shown in Figure 10.3. The action of this gate is that the output is 0 only when all of its inputs are at 1, which is the action of the AND gate followed by an inverter. The combined action of the OR gate and a following inverter gives the NOR gate, whose symbols and truth table are shown in Figure 10.4. The output of this gate will be at logic 0 when any one (or more) of its inputs is at logic 1.

Figure 10.3. The NAND gate, with symbol, truth table and equivalent gate circuit

Figure 10.4. The NOR gate with symbol, truth table and equivalent gate circuit

There is one further gate that is often used and which is called exclusive-OR (XOR). This action (Figure 10.5) is closer to what we normally mean by the word 'or' (meaning one or the other but not both), and the output is 1 if either input is 1, but not when both inputs are zero or both are 1. The diagram also shows that the XOR gate is equivalent to the action of a circuit made using an OR, AND, and NAND gate combination.

Figure 10.5. The XOR gate with truth table and equivalent gate circuit

Note

If you would like to read further about gates and other logic circuits, with details of the more advanced methods such as Boolean algebra, take a look at the book Digital Logic Gates and Flip-Flops, from PC Publishing.

Summary

A truth table is a simple way of expressing the action of a logic circuit, and the standard gates called OR, AND, and NOT can all be illustrated in this way. Gates in IC form often consist of the NAND and NOR type of gates, equivalent to an AND or OR, respectively, followed by NOT. These inverting gates are easier to produce and the action is often more useful than that of the simpler AND or OR type. The XOR gate is another useful type which gives an action closer to the normal meaning of OR, as 'one or the other but not both'.

Analyzing Gate Systems

A circuit that has been made up by connecting several standard gates together, which has several inputs and an output, can be analyzed to find what its action is. This analysis can be done by drawing up truth tables, or by a method called Boolean algebra. The truth-table method is simpler, but more tedious than the Boolean algebra method, which is not dealt with in this book. The method of analysis by truth table can be summarized in a few rules.

1.

Letter each input to the circuit (A, B, C) and also each point where the output of one gate is connected to the input of another gate, using different letters for each point. Label the final output as Q.

2.

Draw up a blank truth table, using one column for each letter that has been allocated, and with 2 n rows, where n is the number of signal inputs to the circuit.

3.

Write in every possible combination of inputs. This is most easily done by starting with 0000 and continuing in the form of a binary count (0001, 0010, 0011, 0100, 0101) up to an input which consists entirely of 1s.

4.

Knowing the truth tables for the standard gates, write in the logic states (0 or 1) for the outputs of the gates at the inputs in each line of the truth table.

5.

The first set of outputs will now be the inputs for the next set of gates, so that their outputs can be written into the truth table.

6.

Continue in this way until the truth table has been completed.

As an example, Figure 10.6 shows a logic diagram for an electronic combination lock. This is a simple design, with four main inputs, and therefore 16 combinations, ignoring the unlock input E. The lock is arranged so that only the correct combination of inputs will open the lock, and any other combination will cause an alarm to sound, so that it cannot be solved by trying each possible combination.

Figure 10.6. A gate circuit used as an example for analysis using truth tables

The inputs, A, B, C, and D are from switches which are to be set in the pattern needed to open the lock. When these switches have been set, pressing the button E will cause the door to unlock (Q   =   1) if the combination is correct, or cause the alarm to sound (X   =   1) if the combination is incorrect. To analyze this digital circuit, label the inputs as shown in Figure 10.7.

Figure 10.7. The table with inputs filled in and intermediate values provided for

The important inputs are A, B, C, and D, because E is used only after all the others have been set into the correct pattern. The intermediate points, where the output of one gate drives the input of another gate, can now be labeled F, G, H, I, and J as shown in Figure 10.7. Because there are four main inputs, 16 lines of truth table will be needed.

There will be one column for each letter which has been used, but the column for the E input can be placed next to the Q column because the E input is used only when the Q output is decided (after all the other inputs have been set). The logic voltage of E can be written as 1 in each row because the lock will act only when E is set to 1 (the activating button is pushed). All of the possible A, B, C, D inputs can now be written down, starting with 0000, and going through a binary count to 1111, a total of 16 rows in the truth table of Figure 10.7.

We can now analyze the circuit (Figure 10.8). Inputs A and B are inputs of a NAND gate. whose logic is that the output is 0 only when both inputs are 1. The F column, which is the output of this gate, therefore has a 0 entered for the last four rows of the table, when both A and B are at logic 1, and a 1 entered for all other rows The G column is just the inverse of the C column, so that its values can now be written in.

Figure 10.8. The table completed, using the truth tables for the gates to fill in the intermediate values

The values in the H column are the outputs of another NAND gate whose inputs are G and D, so that the output is 0 only when G   =   1 and D   =   1, as shown. The values in columns F and H are now the inputs to a NOR gate whose outputs are written into column I.

The logic of the NOR gate is that the output is 1 only when both outputs are at 0, and this occurs only on one line of the table, when A   =   1, B   =   1, C   =   0, D   =   1. When I   =   1 and E   =   1, the output of the AND gate then gives Q   =   1, so that the lock opens. For any other combination of inputs at A, B, C, and D, the value of Q is 0 and the value in J is 1 (because of the inverter) and the combination of E   =   1, J   =   1 causes X   =   1, sounding the alarm but keeping the door locked. In addition, pressing switch E before any of the others are set will also cause the alarm to sound. The action of this set of gates is to open the lock only for the correct combination of inputs and to sound the alarm for an incorrect combination. Figure 10.8 shows the final state of the truth table.

Summary

Any gate circuit can be analyzed by drawing up a truth table, or a set of truth tables. Though this can be tedious when a circuit has a large number of inputs, it is simpler than the Boolean algebra alternative method (though this can be carried out using a computer application). The method relies on using lettering to identify all inputs, outputs, and intermediate points, and drawing up the truth table in stages, starting with all possible combinations at the inputs.

Read full chapter

URL:

https://www.sciencedirect.com/science/article/pii/B978008097063910010X

Interconnections

D.I. Crecraft , S. Gergely , in Analog Electronics: Circuits, Systems and Signal Processing, 2002

12.2.7 Interconnecting digital circuits

Modern digital circuits operate at speeds up to 1 GHz or more. The pulses transmitted between circuits on a printed circuit board can also be as short as a few nanoseconds in duration. At these speeds, the interconnecting lines must be considered as transmission lines. Reflections of pulses from incorrect terminations give rise to transient effects sometimes called 'ringing'. These may lead to an incorrect interpretation of the logic level on that line. Therefore, care must be taken to terminate these interconnections to minimize the reflections. Alternatively the duration of the pulses may be increased, but this is undesirable since it reduces the speed of the operation of the circuit. For longer interconnections special line driver circuits are available.

Read full chapter

URL:

https://www.sciencedirect.com/science/article/pii/B978075065095350012X

Packaging

Eric Y. Chan , in Handbook of Compound Semiconductors, 1995

4.1 High Frequency GaAs Digital Integrated Circuits Packages

GaAs digital circuits have important applications in high speed data and signal processing. Because of its superior radiation-hardness, GaAs is widely accepted for applications in military and space environments. The types of packages generally used for GaAs digital circuits are ceramic dual-in-line packages (CERDIP), flat pack and leadless ceramic chip carriers (LCCC). CERDIP has a wider variation of parasitic capacitance between pins on the ends and the center of the package. It also has high interlead capacitance (> 1 pF) and lead series inductance (about 1 nH), therefore, it is not generally used for applications with 1 Gb/s or higher data rates. A small 16-pin flat pack typically has an interlead capacitance of about 0.5 pF and lead series inductance of about 0.3 nH. It is used in monolithic microwave integrated circuit and high data rate digital applications. A leadless ceramic chip carrier, which does not have any radial leads, allows higher packing density on the circuit board. An LCCC with a ceramic lid has low parasitic capacitance and inductance. A small 28-pad LCCC has an interlead shunt capacitance of about 0.5 pF and a lead series inductance of about 3 nH. It is used in many high speed emitter-coupled logic (ECL) and high packing density circuit board environments. More details on these GaAs digital IC packages and their interconnection technology were given by Gilbert. [41]

Read full chapter

URL:

https://www.sciencedirect.com/science/article/pii/B9780815513742500132

Introduction to Digital Logic Design

Ian Grout , in Digital Systems Design with FPGAs and CPLDs, 2008

5.3.2 Logical Operations

A digital circuit or system will consist of a number of operations on logic values. The basic logical operators are the:

AND

NAND

OR

NOR

exclusive-OR (EX-OR)

exclusive-NOR (EX-NOR)

NOT

Considering two inputs (here called A and B) to a logical operator, the AND, OR, and EX-OR operators provide different results:

The AND operator provides an output when both A and B are at the required values.

The NAND operator provides an output that is the inverse of the AND operator.

The OR operator provides an output when either or both A and B are at the required values.

The NOR operator provides an output that is the inverse of the OR operator

The EX-OR operator provides an output when either but not both A and B are at the required values.

The EX-NOR (or equivalence) operator provides an output that is the inverse of the EX-OR operator.

The NOT operator provides an output that is the logical inverse of the input.

In addition, the BUFFER will provide an output that is the same logic level value as the input. The BUFFER is essentially two NOT gates in series.

These logical operators function in electronic hardware as logic gates. Two inputs (A and B) to the logic gate were considered above, but more inputs are possible to certain logic gates.

Read full chapter

URL:

https://www.sciencedirect.com/science/article/pii/B9780750683975000052

Reliability of silicon integrated circuits

A.S. Oates , in Reliability Characterisation of Electrical and Electronic Systems, 2015

7.3.3.2 Simulation of circuit SER: virtual qualification

In digital circuits, a SEU may occur in any part of a circuit, that is, memory, flip-flop and latches, and random logic. To obtain an estimate of the SER of a circuit, firstly, it is necessary to estimate the SER for each part of the circuit separately. As discussed above, SER for memories and flip-flops can be obtained by performing accelerated SER tests. However, this is time-consuming and costly because of the need to design test circuits and perform accelerated testing and data analysis. Moreover, it is difficult if not impossible to experimentally determine the SER characteristics of the large number of different types of logic cell designs that are used in a large circuit. Therefore, to estimate SER of circuits, it is desirable to use simulation techniques. A fruitful approach is to first simulate the behavior of individual SRAM and flip-flop cells to SER and to then assemble these cells into the circuit and then simulate the overall response of the circuit [ 114]. Typically, simulations of SER behavior of SRAM and logic cells utilize TCAD together with a database of nuclear reaction data to determine the charge collection response to an energetic particle strike. The output of the charge collection simulation is then linked to a SPICE circuit simulator to predict the electrical consequences for the circuit [115]. By simulating all the various types of logic cells contained in a large circuit, it is possible to estimate the circuit SER. Figure 7.16 shows examples of the high level of accuracy that is attainable through the use of simulators to predict SER in SRAM and flip-flops.

Figure 7.16. A comparison of experimental data for SER-related failure rates of several different designs of flip-flop and SRAM with simulations performed using the TFIT tool. It is now possible to accurately simulate SER of these basic circuit building blocks and to then synthesize these blocks into large circuits and simulate SER impact.

Read full chapter

URL:

https://www.sciencedirect.com/science/article/pii/B9781782422211000071